论坛第三期将邀请南加利福尼亚大学的Viktor K. Prasanna（ACM/IEEE/AAAS Fellow）教授于2021年12月13日下午3：30线上主讲，欢迎大家参加。
Zoom会议ID：402 098 8801
报告题目: Accelerating Graph Neural Networks
报告简介: Recently, Graph Neural Networks (GNNs) have been used in many applications leading to improved accuracy and fast approximate solutions. Training as well as Inference in these networks is computationally demanding. Challenges include access to irregular data, sparse as well as dense matrix computations, limited data reuse and heterogeneity in the various stages of the computation. With recent dramatic advances in Field Programmable Gate Arrays (FPGAs), these devices are being used along with multi-core and novel memory technologies to realize advanced platforms to accelerate complex applications. This talk will review our recent work in the Data Science Lab at USC (dslab.usc.edu) and advances in reconfigurable computing (fpga.usc.edu) leading up to current trends in accelerators for data science. For graph embedding, we develop GraphSAINT, a novel computationally efficient technique using graph sampling and demonstrate scalable performance. We develop graph processing over partitions (GPOP) methodology to handle large scale graphs on parallel platforms. On a current FPGA device, we demonstrate up to 100X and 30X speed up for full graph GNN computational steps compared with state of the art implementations on CPU and GPU respectively. We also demonstrate specific accelerators for two widely used GNN models: GraphSAGE and GraphSAINT. We conclude by identifying opportunities and challenges in exploiting emerging heterogeneous architectures composed of multi-core processors, FPGAs, GPUs and coherent memory.
Viktor K. Prasanna (ACM/IEEE/AAAS Fellow，ceng.usc.edu/~prasanna) is Charles Lee Powell Chair in Engineering in the Ming Hsieh Department of Electrical and Computer Engineering and Professor of Computer Science at the University of Southern California. He is the director of the Center for Energy Informatics at USC and leads the FPGA (fpga.usc.edu) and Data Science Labs (dslab.usc.edu). His research interests include parallel and distributed computing, accelerator design, reconfigurable architectures
and algorithms and high performance computing. He served as the Editor-in-Chief of the IEEE Transactions on Computers during 2003-06 and is currently the Editor-in-Chief of the Journal of Parallel and Distributed Computing. Prasanna was the founding Chair of the IEEE Computer Society Technical Committee on Parallel Processing. He is the Steering Chair of the IEEE International Parallel and Distributed Processing Symposium and the Steering Chair of the IEEE International Conference on High Performance Computing. His work has received best paper awards at leading forums in parallel computing, HPC and FPGAs, including ACM/IEEE Computing Frontiers, International Parallel and Distributed Processing Symposium, ACM International Symposium on FPGAs, among others. He is a Fellow of the IEEE, the ACM and the American Association for Advancement of Science (AAAS). He is a recipient of 2009 Outstanding Engineering Alumnus Award from the Pennsylvania State University and a 2019 Distinguished Alumnus Award from the Indian Institute of Science. He received the 2015 W. Wallace McDowell award from the IEEE Computer Society for his contributions to reconfigurable computing.